Siliconus & Team is proud to be part of playing pivotal role in execution of
High Speed Network Server SoC featuring standard IPs and crossbars.
SoC used in tablet devices to make secured phones with its interfaces.
FPGAs for high workload with various interfaces.
Low-Power, Hearing aid devices, WPU & IoT Processors.
SoC, Industrial & Automotive Microcontrollers.
CPU with Latch-based designs & Graphics Chips
Assurance
- Having best-in-class expertise in cutting-edge technologies.
- An exceptional team with lots of enthusiasm to learn, explore and work with zeal.
- Will of completing the tasks on time hardwired in our system, which makes the critical projects go in a smooth fashion.
- With strong experience of first-time silicon success across multiple tape outs, we are glad that our designs are working great on silicon and thus by ensuring the unparalleled services.
Consulting
Our Specialties
• Having best-in-class expertise in cutting-edge technologies.
• Turn-key execution of projects from RTL-2-GDS.
• Tape-outs in multiple technologies and foundries for various SoCs like Processors, Network, Wearable, Low-Power, IoT, IPs, Automotive.
• Working in stealth mode and maintaining the work confidentiality.
• Exemplary leadership in planning and implementation for faster TurnAround-Time to meet tighter schedules.
• Expertise in Physical Design, Physical Verification, Flow Setup, Automation, CAD/Methodology using wide-variety of tools.
• Can work as an integral part of the Customer’s team.
• Possess a highly sophisticated in-house build management tool FAB (Flow Architect & Builder) that makes the run and tracking seamless.
What we do
⦁ Flow Setup and Execution in multiples areas for variety of designs.
⦁ Implementation & SignOff
-Synth, Constr Validation & LEC.
-Floorplan, Power Plan, Place n Route.
-IR / EM.
-STA & ECOs.
-Physical Verification
⦁ Full Chip Flows
-Full Chip Floorplan, Partitioning & Powerplan,
-IO Pad Placement, Bump Planning, RDL Routing
-Full Chip STA, ECO Generation & Push down
– Full Chip Phys Ver.
-Full Chip LEC & VCLP.
-Full Chip IR / EM, ESD Calculations.
⦁ Developed best-in-class Automated platform for Synthesis-to-Tapeout implementation named FAB (Flow Architect & Builder).
⦁ Capable of handling high speed designs.
⦁ Advanced node checks like DFM, DFY, Litho, LPC, DP.
⦁ Multiple tool expertise and correlating them.
⦁ Interactions with other teams like Architecture, RTL, Package, IP Vendor, Simulation, EDA Vendor, DFT.
Frequently Asked Questions
What kind of projects do you do?
– Turn-Key implementation.
– Design closure in the areas of interest.
– ODC & On-Site execution.
– Both T&M and FPP modes.
How can you offer such a cost-effective price?
We are able to offer the best prices in the industry for our services due to our work ethics and efficiency.
Which design services can Siliconus offer?
Physical Design (Back End) in ASIC / VLSI / FPGA
Which areas do you excel in?
We have expertise in:
- Full Chip Flows & Integrations Tasks
- Physical Design (PnR) from Syn to Physical Verification
- All Signoff checks incl LEC, VCLP, DFM, Litho, IR/EM
- Static Timing Analysis (STA) – Block & FullChip
- Flow Setup, Automation, CAD & Methodology
How good is your team?
Our team is well conversed with industry standard tools Cadence, Synopsys, Mentor and are ready to learn new tools with ease.